JVD™ Solder Advantages

WIDE RANGE OF SOLDERS

Many common lead free solders used in microelectronics, such as:

• AuSn 80/20 (eutectic), and 78/22, 75/25, 73/27
• SnAg
• SnAgCu
• SnIn
• SnInAg 

ADHESION/BARRIER METALS

Ti, Cr, Ni,   Ti/Pt/Au and Ti/Ni/Au stacks

RELATED METALS

Au, Ag, Sn

SUBSTRATE MATERIALS

Most wafers up to 8″ diameter, eg:  Si, glass, InP, SiC, etc. 

Most ceramic or semiconductor boards and thin substrates that fit inside an 8″ circle, eg:  AlN, GaAs, Al₂O₃, BeO, etc.

Heatsinks, eg: Cu, CuW, etc.

SUBSTRATE SIZE

Wafers:   2″, 3″, 4″, 6″, 8″

Square and rectangular substrates up to 6″ per side, down to small heatsinks of millimeter dimensions

SINGLE WAFER PROCESSES

2″ to 8″ diameter wafers, or multiple substrates that fit inside the scan zone

BATCH PROCESSES

     4″ wafers or 4″ x 4″ batches
     Small substrates in batches of up to 20 per run
     Small heatsinks such as Cu and CuW in appropriate fixtures

THICKNESS RANGE

Solders, 1 to 20 microns

Adhesion/diffusion layers, typically 1,000 to 2,500 Å

HIGH DEPOSITION RATES

Example:  5 microns solder on a 6″ wafer ~ 25 minutes.  Additional time for other processing steps.  

The “high” pressure of JVD implies high metal atoms concentration in jet;  therefore, high deposition rates.

ALLOY DEPOSITION

Alloy components deposit together rather than as separate layers.

ACCURATE COMPOSITION

Metal vapor deposited from the jet preserves the starting alloy composition.

THICKNESS CONTROL

Plus/minus 10% across deposition surface

“ION ETCH” PRE-CLEAN

In situ low ion energy Ar+ etch, high density plasma for residual resist removal.

Other available in situ pre-clean techniques include RF oxygen plasma and microwave discharge O atom exposure.

MINIMAL MATERIAL WASTE 

Typical capture efficiencies in the jet are ~ 90%.

LOW TEMPERATURE PROCESSING

Fast relative motion of substrate keeps its temperature low due to short residence time facing jet source energy.  Maximum final wafer T of most single metal processes is less than 90°C.  For multiple metal stacks, including those with high melt T materials, final wafer T can reach up to 110-120ºC.  

PHOTORESIST AND LIFTOFF COMPATIBILITY                        

The JVD process is compatible with most photoresists that are applied and processed according to manufacturer directions.  Low process T avoids thermal damage to the photoresist mask.

NANOCLUSTER DEPOSITION

In the nozzle and jet, JVD flow and pressure conditions can be easily modified to promote nucleation, growth, and deposition of nanoclusters at very high rates.  Cluster deposition, which is highly directional, is advantageous for solder bumps because the high inertia of the accelerated, heavier clusters gives trajectories almost exactly perpendicular to the wafer.  In consequence, there is little shadowing by resist walls, and since sidewall deposition is also reduced, there is reduced breadloafing.  For small windows in the resist where the aspect ratio is high, hole filling by nanoclusters is extremely efficient. We put this key nanocluster capability of JVD to increasing use in making small bumps in dense arrays.

CLEAN AND GREEN OPERATION

With starting materials of pure metals, there are no toxic precursors or effluents, and high capture efficiency minimizes waste.  Nanocluster mode operation is particularly effective in concentrating the deposit.  For additional information, click on the following link for the 2011 EPA SBIR success story in “Science Matters” newsletter:   www.epa.gov/sites/production/files/2015-06/documents/jetprocess.pdf

COMPACT DEPOSITION CHAMBERS  

JVD deposition chambers are compact. The deposition tool deploys JVD’s solder deposition capabilities in a particularly concentrated form. Up to 4 different jet sources, specific to the coating menu, are arranged on the chamber, for example, Ti, Pt, AuSn and Au. The spinning substrate visits each material source in turn, and is scanned to build up a complete material layer or metal stack.